1. Field of the Invention
The present invention relates generally to current monitoring circuits and, more particularly, to an I.sup.2 t monitoring circuit which decrements a counter in response to pulses received from a voltage-to-frequency converter that is responsive to the magnitude of the current squared.
2. Description of the Related Art
Various types of circuits and monitoring systems which measure and react to electrical current characteristics are known to those skilled in the art. One particular type of monitoring circuit is responsive to the I.sup.2 t characteristic of a measured current. For example, U.S. Pat. No. 4,442,472, which issued to Pang et al on Apr. 10, 1984, discloses a solid state trip circuit with a digital timer. It describes an electrical circuit which actuates a trip mechanism of a circuit interrupter and includes a current sensor having a pair of output terminals and which is designed to cooperate with at least one electrical power conductor for the purpose of sensing the amount of current flowing through the conductor. Circuitry is provided for developing a voltage signal that is proportional to a sensed current signal. The magnitude of the voltage signal is used by additional circuitry to actuate a trip mechanism of a circuit interrupter when the current flowing in the electrical power conductor exceeds a predetermined threshold level. The control circuit includes a digital timing circuit which produces a signal that is responsive to the magnitude of the voltage at an input terminal of the timing circuit for producing pulses having a first frequency and also includes an additional circuit to produce pulses having a second frequency in response to the signal received at an input terminal.
U.S. Pat. No. 4,404,612, which issued to Hughes et al on Sept. 13, 1983, discloses a DC solid state overload relay for use with a DC motor controller. This patent discloses a device that monitors current signals, from an ammeter shunt, which are received by an electronic sensing unit that performs electro-mechanical overload relay functions. These functions are performed independently of each other and are provided with independently adjustable reference setting devices.
U.S. Pat. No. 4,347,541, which issued to Chen et al on Aug. 31, 1982, discloses a circuit breaker which incorporates a full wave rectifier that converts a current into a proportional voltage. A peak detector provides an approximately true peak value voltage of the standardized voltage. This device also utilizes an instantaneous trip circuit, a ground fault detector and both short term and long term delay circuits which provide trip signals upon the occurrence of certain monitored conditions.
U.S. Pat. No. 4,217,616, which issued to Jessup on Aug. 12, 1980, discloses a motor overload protection circuit which senses a motor overload current and couples this current to the input of an operational amplifier, causing the amplifier output to invert and charge a plurality of parallel connected capacitors. Although this device is not directly related to an I.sup.2 t circuit, it monitors an electrical current and provides a luminous source which is coupled to an output of an amplifier and becomes non-luminous when the amplifier is in its inverted state.
U.S. Pat. No. 3,604,983, which issued to Levin on Sept. 14, 1971, discloses an instantaneous and inverse-time-overcurrent sensor which comprises two rectifiers. This device is completely analog in operation and uses passive components. It provides circuitry for producing an instantaneous trip signal upon the occurrence of an excessively high value of overcurrent. It also includes a solid state reactor stage that is coupled to an inverse-time unit so as to produce a trip signal when a time-overcurrent condition in the monitored circuit exceeds a preselected value.
U.S. Pat. No. 4,589,052, which issued to Dougherty on May 13, 1986, discloses a digital I.sup.2 t pickup device for a static trip circuit breaker. It provides circuitry which is able to be manufactured in a single chip configuration. After an analog-to-digital conversion, a signal is compared with a continuous binary count. A time delay is obtained by means of a circuit which uses a fixed frequency to gate a pulse stream that is proportional to the squared magnitude of the overcurrent level.
U.S. Pat. No. 4,476,511, which issued to Saletta et al on Oct. 9, 1984, discloses a circuit interrupter with a numeric display. It is microprocessor based and squares a digital signal. It utilizes a rectified peak detection circuit for calculating I.sup.2 t.
U.S. Pat. No. 4,423,459, which issued to Stich et al on Dec. 27, 1983, discloses solid state circuit protection system which utilizes a rectified signal for the purpose of monitoring either a single phase or polyphase current flowing through a conductor. Sample values are periodically converted to digital form and tested to determine whether or not they deviate from previous samples by a predetermined amount. Samples which do not deviate by the predetermined amount cause a first counter to be incremented while deviating samples cause a second counter to be incremented. The ratio of the magnitudes of the first and second counters is used to recognize current imbalances.
U.S. Pat. No. 4,266,259, which issued Howell on May 5, 1981, discloses an overcurrent signal process or which comprises both long time and short time trip mode networks. One of the networks compares a signal to a sloping I.sup.2 t portion of an established trip time curve while the other network optionally measures the overcurrent signal against a second I.sup.2 t curve. The circuitry is completely analog and utilizes a composite peak rectified signal along with the two I.sup.2 t curves.
U.S. Pat. No. 4,513,342, which issued to Rocha on Apr. 23, 1985, discloses an I.sup.2 t protection system which utilizes a sensor that provides an output signal which is proportional to the square of the load component current. The squared current signal is integrated and compared to a current squared-time value and an output signal is enabled when the load component instantaneous I.sup.2 t value is greater than a current squared-time value set at the comparator. In response, this circuit removes the current flow from the protected component.